(1) Field of the Invention
The present invention relates to a dynamic semiconductor memory device having a refresh-address generator, and more particularly to a dynamic semiconductor memory device which facilitates examination of a refresh-address generator by initially setting the output of a refresh-address counter to a constant value when the power supply of the memory device is turned on.
Generally, a dynamic semiconductor memory device includes a capacitor in each memory cell. The capacitor is charged or discharged to store data of, for example, "1" or "0". Because the capacitor naturally discharges, however, it is necessary to cyclically recharge it in the case of "1" data, i.e., when the capacitor is originally charged up. This cyclical charging of the capacitor is known as a "refresh operation".
To effect the refresh operation, a refresh-address signal must be cyclically applied to each memory cell. Instead of applying the address signal from the outside of the memory chip, a system is known in which a memory chip is provided with a refresh-address generator. The refresh-address generator comprises a refresh-clock generator for generating clock signals and a refresh-address counter for generating refresh-address signals in response to the clock signals. The memory cells are refreshed by the refresh-address signals.
In such a system, it is necessary to examine, especially before shipping, the memory chip, to determine whether or not the refresh-address generator generates the correct refresh addresses. To do this, first the operation of the memory cell array itself is examined by applying address signals from the outside, instead of from the refresh-address generator. After making sure that the memory cell array operates normally, the refresh-address generator is examined.
(2) Description of the Prior Art
In conventional dynamic semiconductor memories including refresh-address generators, the output of the refresh-address counter is not initially reset when the power supply for the memory chip is turned on. Therefore, the contents of the refresh-address counter cannot easily be recognized from the outside. As a result, as hereinafter described in detail, the refresh-address generator cannot easily be examined because even when the refresh-address counter operates normally, the test data pattern, written by the address signals output from the refresh-address counter during examination of the refresh-address generator will not always coincide with the data pattern read out by address signals applied from the outside.